The invention relates to a voltage converter, for converting an input voltage to an output voltage, comprising a plurality of cascaded voltage multipliers having clock inputs, and a control circuit for supplying clock signals to the clock inputs, for controlling the voltage multipliers.
Such a voltage converter is known from a publication in the IEEE Journal of Solid-State Circuits, Vol. SC-11, no. 3, June 1976, pages 374-378. In said publication the output voltage of the voltage converter serves to provide high supply voltages in NMOS integrated circuits.
A drawback of the known voltage converter is that the power efficiency of the voltage converter strongly depends on the value of the output voltage with respect to the value of the input voltage. This can lead to a relatively low power efficiency of the voltage converter.